1. Field of the Invention
The present invention relates generally to a wideband code division multiple access) (WCDMA wireless communication system. In particular, the present invention relates to a method and apparatus for carrying out bit-scrambling/descrambling in the media access control-high speed (MAC-hs) layer of a transmitter/receiver for high-speed packet transmission/reception.
2. Description of the Related Art
Mobile communication systems have evolved from voice-focused service in its initial developmental stage to high-speed, high-quality wireless packet data transmission for provisioning of data service and multimedia service. The standardization work dedicated to high speed downlink packet access (HSDPA) and 1xEV-DV (Evolution-Data and Voice) mainly by 3GPP (3rd Generation Partnership Project) and 3GPP2 is a clear evidence of efforts to find a solution to 2 Mbps or higher-speed, high-quality wireless data packet transmission. 4th generation mobile communication systems aim to provide higher-speed, higher-quality multimedia service.
In wireless communications, the radio channel environment is an obstacle to high-speed, high-quality data service. The radio channel environment varies often due to fading-induced signal power change, shadowing, Doppler effects caused by mobile movement and frequent mobile velocity changes, interference from other users, and multipath interference as well as additive white gaussian noise (AWGN). Thus it follows that advances in technology are needed to improve adaptability to the channel environment beyond the technologies of the existing 2nd and 3rd generation mobile communication systems in order to provide the high-speed wireless data packet service. Although fast power control adopted in the existing systems improves the adaptability to the channel environment, both 3GPP and 3GPP2 are dedicated to standardization of a high-speed data packet transmission system. Both standards commonly address adaptive modulation and coding scheme (AMCS) and hybrid automatic repeat request (HARQ).
The AMCS is a method of changing a modulation scheme and a coding rate adaptively according to the change of a downlink channel environment. Generally, a user equipment (UE) measures the signal-to-noise ratio (SNR) of a downlink signal and reports it to a Node B. The Node B then estimates the downlink channel environment based on the SNR information and decides an appropriate modulation scheme and coding rate according to the estimation. Therefore, a system using the AMCS applies a higher-order modulation scheme such as 16 QAM (quadrature amplitude modulation) or 64 QAM and a high coding rate such as ¾ to a UE near to a Node B, that is, a UE in a good channel status. To a UE at a cell boundary, that is, a UE in a bad channel status, the system applies a lower-order modulation scheme such as BPSK (binary phase shift keying), QPSK (quadrature psk), or 8 PSK (8-ary PSK) and a low coding rate such as ½. The AMCS improves system performance on the average by reducing interference relative to the conventional fast power control method.
The HARQ is a scheme that, when an error is generated in an initially transmitted data packet, retransmits the packet to compensate for the error. The HARQ scheme can be further categorized as either chase combining (CC), full incremental redundancy (FIR), and partial incremental redundancy (PIR) methods for error compensation.
In the CC method of error compensation, the same packet that was initially transmitted is retransmitted in its entirety. A receiver combines the retransmitted packet and the buffered initially transmitted packet according to a predetermined method, thereby increasing the reliability of the coded bits input to a decoder and thus achieving a total system performance gain. The combining of the same two packets gives the effect of repetition coding. Hence, an average performance gain of about 3 dB is achieved.
The FIR method of error compensation improves decoding performance at the receiver by transmitting a packet comprising parity bits generated from a channel encoder instead of the same initially transmitted packet. The decoder uses the new parity bits as well as the initial transmission information. The resulting decrease in coding rate increases decoding performance. It is well known in coding theory that a performance gain at a low coding rate is higher than that achieved from repetition coding. Thus, the FIR offers good performance over the CC in terms of performance gain.
Unlike the FIR, the PIR method of error compensation transmits a data packet comprised of information bits and new parity bits during retransmission. During decoding, the initially transmitted information bits are combined with the retransmitted information bits, leading to the effect of the CC method of error compensation, and the use of the parity bits leads to the effect of the FIR method of error compensation. The PIR uses a higher coding rate than the FIR. Thus, the PIR generally stands between the FIR and the CC in terms of performance.
While the AMC and HARQ are independent techniques to increase adaptability to the change of links, a combination of them can improve the system performance considerably. That is, a transmitter in a Node B decides a modulation scheme and a coding rate for a channel encoder adaptively according to the downlink channel status and transmits a data packet correspondingly. A receiver in a UE, if it fails to decode the data packet, requests a retransmission. The Node B retransmits a predetermined data packet in a predetermined HARQ scheme in response to the retransmission request.
FIG. 1 is a block diagram of the physical layer configuration of a conventional transmitter for high-speed packet data transmission. As illustrated in FIG. 1, the transmitter is comprised of a cyclic redundancy check (CRC) adder 102, a bit scrambler 104, a code block segmenter 106, a channel encoder 108, an HARQ functionality block 110, an interleaver 112, a constellation rearranger 114, a modulator 116, a controller 118, and a transmit antenna 120.
Referring to FIG. 1, a transport block 100 received from a higher media access control (MAC) layer is attached with a CRC code in the CRC adder 102 and provided to the bit scrambler 104. The structure of the transport block 100 will be described below.
For an high speed-downlink shared channel (HS-DSCH), a protocol data unit (PDU) generated in the MAC layer includes a MAC-hs header and one or more MAC-hs service data units (SDUs). Notably, a MAC-hs SDU is equivalent to a MAC-d PDU. Only one MAC-hs PDU is transmittable to one UE for one transmission time interval (TTI) and the MAC-hs header is of a variable length. MAC-hs SDUs in one TTI are in the same reordering queue.
The bit scrambler 104 scrambles the CRC-attached transport block with a predetermined initial value on a per-bit basis. The scrambled bits are provided to the channel encoder 108 via the code block segmenter 106. If the size of the input data exceeds the maximum number of bits that can be input to the channel encoder 108, the code block segmenter 106 segments the data by the maximum bit number.
After a turbo coding on the input bits, the channel encoder 108 outputs coded bits comprising a systematic part representing the input bits and a parity part representing parity bits for error correction of the systematic part. The channel encoder (turbo encoder) 108 encodes the input bits at least one coding rate such as ½, ¾ and the like. Alternatively, the channel encoder 108 may have a mother coding rate of ⅙ or ⅕ so as to support a plurality of coding rates through puncturing or repetition. In this case, an operation for deciding one of the coding rates is needed.
The HARQ functionality block 110 includes a rate-matching operation of the coded bits to a predetermined data rate. The rate matching is done by repetition or puncturing of the coded bits, when the number of the coded bits is not equal to that of bits transmittable over the air. The interleaver 112 interleaves the rate-matched coded bits.
The constellation rearranger 114 rearranges the interleaved bits and the modulator 116 maps the rearranged bits to modulation symbols in a modulation scheme of an M-ary PSK or M-ary QAM. The modulation symbols are transmitted through the transmit antenna 120. The constellation rearranger 114 distinguishes the systematic part of the interleaved bits from the parity part thereof and allocates the systematic part to a high-reliability position and the parity part to a low-reliability position. Also, the constellation rearranger 114 distinguishes initial transmission bits from retransmission bits and maps the initial transmission bits to modulation symbols with a low error probability and the retransmission bits to modulation symbols with a high error probability.
Meanwhile, the controller 118 controls the coding rate of the channel encoder 108, the rate matching of the HARQ functionality block 110, and the modulation scheme of the modulator 116 according to the current radio channel status. In the case of an HSDPA wireless communication system, the controller 118 supports the AMCS.
With reference to FIG. 2, the structure of a conventional receiver for high-speed packet data reception will be described. As illustrated in FIG. 2, the receiver is comprised of a receive antenna 200, a blind power detector (BPD) 202, a demodulator 204, a constellation rearranger 206, a deinterleaver 208, a bit decollection buffer 210, a rate dematcher 212, a code block desegmentation buffer 214, a turbo decoder 216, a bit descrambler 218, a CRC checker 220, and a data buffer 222.
Referring to FIG. 2, the BPD 202 estimates the pilot-to-traffic power ratio of a signal received through the receive antenna 200. The demodulator 204 extracts a bit stream from the input symbol sequence based on the estimated power ratio. The constellation rearranger 206 rearranges the bit streams to output rearranged coded bits. The deinterleaver 208 deinterleaves the rearranged coded bits in correspondence with the interleaving of the interleaver 112 in the transmitter. The deinterleaved bits are applied to the input of the turbo decoder 216 via the bit decollection buffer 210, the rate dematcher 212, and the code block desegmentation buffer 214. The turbo decoder 216 extracts information bits by separating the received bits into a systematic part and a parity part.
In a 3rd generation communication system, the transmitter transmits a preset pilot signal on a common pilot channel that all users can receive. The receiver estimates channel characteristics, especially fading using the pilot signal. The estimated channel characteristics are used to recover a signal distorted by the fading to a original signal and also to estimate the pilot to traffic power ratio.
The pilot to traffic power ratio estimation is an essential process for successful demodulation of a signal modulated in a higher-order modulation scheme such as 16 QAM or 64 QAM. If the transmitter notifies receiver of the power ratio, the power ratio estimation is not needed. Yet, in a general high-speed packet transmission system like 1xEV-DV or HSDPA using a modulation scheme with an order equal to or higher than 16 QAM, the receiver is supposed to estimate the power ratio to relieve signal load. Receiving the power ratio estimation at the receiver instead of receiving the power ratio by signaling is called blind power ratio detection. In the case where the transmit power of the transmitter is non-uniform, the use of the pilot-to-traffic power ratio in demodulation may cause problems.
The situation of non-uniform average power in the transmitter will be discussed below. High-order modulation symbols have different power levels. In 16 QAM, the power of the four inner symbols close to the origin (0, 0) is given as Pin=2A2 on a coordinate plane having in-phase (I) component and quadrature-phase (Q) components along x and y axes. For the eight middle symbols, Pmiddle=10A2 and for the four outer symbols, Pouter=18A2. A denotes the distance between each inner symbol and the axes. Thus, the total average power of the three types of symbols is given by Ptotal=(2A2+10A2+18A2)/3=10A2. If A is 0.3162, Ptotal=1.
Let a data symbol transmitted on a data channel be denoted by Sd, and a pilot symbol transmitted on a pilot channel be denoted by Sp, If the power of a symbol is <S>, a transmitted signal Tx from the transmitter is expressed asTx=WdAdSd+WpApSp  (1)
where W denotes Walsh spreading codes by which the data channel is distinguished from the pilot channel, A denotes the channel gains of the data and pilot channels, and S denotes traffic data symbols and pilot symbols in a packet. The pilot symbols Sp follow a preset pattern between the transmitter and the receiver.
The high-speed packet transmission system transmits the signal Tx in packets, wherein each packet is loaded a plurality of slots. One slot duration is 0.667 ms and the number of symbols per slot varies depending on the spreading factor (SF) of the slots. For asynchronous HSDPA, one packet uses three slots and 480 symbol are transmitted per packet for a SF=16.
Therefore, since one modulation symbol is comprised of four bits, 1920 bits are randomly generated in 16 QAM. In QPSK, one symbol is comprised of two bits and thus 960 bits are generated. If 120 inner symbols, 240 middle symbols, and 120 outer symbols are uniformly generated for transmission of 480 symbols, the average power of the 480 symbols, <Si> is 1. However, all the symbols are not always uniformly generated in real transmission. In an extreme case where 1920 bits are generated to be all 0s, all the symbols are A+jA inner symbols, resulting in <Si>=0.2. The receiver also estimates the average power to be 0.2, not 1, despite the absence of noise or distortion. On the contrary, if all the bits are 1s, the symbols are 3A+j3A outer symbols and <Si> is 1.8.
The characteristics of the non-uniform average power will be described in terms of probability density function (PDF) as follows. Given a total transmit power of 1, then 90% of the total transmit power (Ad2=0.9) or the average power of the traffic channel, is 0.9 (P=Ad2<Si>=Ad2) in the case where the three types of symbols (inner symbols, middle symbols and outer symbols) are perfectly uniformly generated. Yet, the traffic channel exhibits a power distribution with m=0.9 and σ=0.0232 where m is the mean power and σ is the standard deviation.
If the traffic channel occupies 90% of the total transmit power (Ad2=0.9), the average symbol power <Si> is 0.8, and noise is generated with a power of 0.2 (<N>=0.2), the received power of an AWGN channel is calculated in a general blind power ratio detecting method. The method of detecting an accumulated average of the traffic channel can be expressed byRx=WdAdSd+WpApSp+N  (2)
After separating the pilot channel by Walsh decovering, the power remains:Rxd=AdSd+N  (3)
To achieve Ad, the accumulated average power is calculated byP=Ad2<Sd>+<N>  (4)
In an ideal case where <Sd> is 1 and <N> is 0, P=Ad2=0.9 by Eq. (4). However, as described before, if <Sd> is 0.9 and <N> is 0.2, P=Ad2<Sd>+<N>=1.01. Since P≠Ad2, Ad2 cannot be achieved accurately.
As described above, when transmission symbols are uniformly created on a 16 QAM signal constellation, an accurate symbol boundary Ad can be estimated by effectively estimating the pilot to traffic power ratio. Other-wise, the symbol boundary Ad cannot be estimated accurately, thereby degrading performance at demodulation. The performance decrease is estimated to be 1.0 to 1.5 dB.
Accordingly, the bit scrambler 104 and the bit descrambler 218 are used to solve the problem of non-uniform transmit power. The bit scrambler 104 operates input bits with a predetermined initial value in the manner that converts non-uniform input bits concentrated on 1 or 0 to have a uniform distribution of 1's and 0's. The bit descrambler 218 performs the reverse of the bit scrambling on the received bits to thereby recover the original bits.
Regarding decoding at the receiver, the turbo decoder 216 extracts information bits more accurately by iterative decoding. Yet, too many occurrences of iteration lead to decoding delay and power consumption. Thus, the iterative decoding of the turbo decoder 216 is limited to a predetermined maximum number. However, if normal data recovery is achieved before the maximum number of iterations, the iterative decoding is terminated so that the process delay and power consumption of the turbo decoder 216 can be reduced considerably. To do so, a CRC check on decoder output can be served as a criterion to terminate the iterative decoding.
To determine whether to terminate the iterative decoding by the CRC check, first, all code blocks must include CRC bits to allow a CRC check in the turbo decoder. This condition is partially satisfied in the HSDPA system. When a higher-layer transport block size (TBS) is shorter than or equal to a maximum length for turbo coding (that is, 5114), the condition is satisfied. If the TBS is longer than 5114, the transport block is segmented into a plurality of code blocks and each code block cannot include a CRC. In this case, the above condition is not satisfied.
Secondly, when determining whether to terminate the iterative decoding by the CRC check, in a conventional system, a receiver cannot perform a CRC check without bit scrambling because a transmitter performs bit scrambling after CRC attachment. Therefore, the CRC check-based iterative decoding termination is not viable. To use the CRC check-based iterative decoding termination scheme in the turbo decoder 216, the bit scrambler 218 must be incorporated into the turbo decoder 216.
It is not easy, however, to include the bit descrambler 218 within the turbo decoder 216. Moreover, in a structure having the turbo decoder 216 separated from the bit scrambler 218, the turbo decoder 216 must be modified to feed back the output of the bit descrambler 218 to the input of the turbo decoder 216.
Hence, there is a need for a transmission/reception system in which the CRC check-based iterative decoding termination scheme can be applied using the existing turbo decoder structure.